发明名称 WORD LINE SELECTION CIRCUIT AND ROW DECODER
摘要 A first exemplary aspect of the present invention is a word line selection circuit where address decode signals composed of a power supply voltage and a first voltage lower than a ground voltage are input, and that a word line selection signal composed of the first voltage and a second voltage higher than the power supply voltage is output not via a level shift circuit according to the address decode signals.
申请公布号 US2014313815(A1) 申请公布日期 2014.10.23
申请号 US201414319442 申请日期 2014.06.30
申请人 Renesas Electronics Corporation 发明人 TAKAHASHI Hiroyuki;YOSHIDA Masahiro;TAKEDA Noriaki
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
主权项 1. A decode circuit comprising: a pre-decode circuit configured to operate by using a first power supply voltage supplied through a first power supply voltage line and a second power supply voltage supplied through a second power supply voltage line, and to provide a first pre-decode signal and a second pre-decode signal to a first pre-decode signal line and a second pre-decode signal line, respectively; a variable resistance element responding to the first pre-decode signal and being coupled between a power supply node and an output node, the power supply node supplied with a third power supply voltage supplied through a third power supply voltage line, the third power supply voltage being higher than the first power supply voltage, and a first transistor having a gate electrode coupled to the first pre-decode signal line, a source-drain path coupled between the output node and a first node, the first node whose voltage level being responsive to the second pre-decode signal.
地址 Kawasaki JP