| 摘要 |
<p>The invention relates to the general field of complex electronic and/or computerized system architectures for which the interchanges take the form of irregular data flows prompted by processing functions of variable duration in time. The object of the invention is an architecture designed for electronic systems having a plurality of processing nodes in which each node provides a function or part of a function implemented by the system. This architecture is based on one single synchronization link which supplies all the modules with a common synchronization message containing synchronization information and a simplified header. There are a plurality of asynchronous data interchange links. Each link allows a message interchange between two specific processing nodes, with the interchanged messages having data to be processed, accompanied by a generic header. The asynchronous links' generic header includes all the information relating to the system's operating step to which the interchanged data refer. The synchronous link's simplified header makes it possible to determine the data stream to which the associated synchronization information applies. Each processing node has means suitable for interfacing with the synchronous and asynchronous links. The invention applies particularly to the design of electromagnetic or acoustic sensors, such as radars and sonars.</p> |
