| 发明名称 | Semiconductor device and method for manufacturing same | ||
| 摘要 | According to one embodiment, a semiconductor device includes, a semiconductor substrate including a plurality of fins formed in an upper surface of the semiconductor substrate in a first region to extend in a first direction, a first gate electrode extending in a second direction intersecting the first direction to straddle the fins, a first gate insulating film provided between the first gate electrode and the fins, a second gate electrode provided on the semiconductor substrate in the second region; and a second gate insulating film provided between the semiconductor substrate and the second gate electrode. A layer structure of the first gate electrode is different from a layer structure of the second gate electrode. | ||
| 申请公布号 | US8860104(B2) | 申请公布日期 | 2014.10.14 |
| 申请号 | US201213409319 | 申请日期 | 2012.03.01 |
| 申请人 | Kabushiki Kaisha Toshiba | 发明人 | Sudo Gaku |
| 分类号 | H01L29/82;H01L21/8234;G11C11/16;H01L27/088 | 主分类号 | H01L29/82 |
| 代理机构 | Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P. | 代理人 | Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P. |
| 主权项 | 1. A semiconductor device comprising: a semiconductor substrate including a plurality of fins formed in an upper surface of the semiconductor substrate in a first region to extend in a first direction; a first gate electrode extending in a second direction intersecting the first direction to straddle the fins; a first gate insulating film provided between the first gate electrode and the fins; a second gate electrode provided on the semiconductor substrate in a second region: a second gate insulating film provided between the semiconductor substrate and the second gate electrode; an element-separating insulating film provided on the semiconductor substrate and disposed in a third region and in a lower portion of a portion between the fins; and a resistance member provided on the element-separating insulating film in the third region, a composition and a thickness of the resistance member being the same as a composition and a thickness of the second gate electrode, a layer structure of the first gate electrode being different from a layer structure of the second gate electrode, and the upper surface of the semiconductor substrate of the third region being positioned lower than the upper surface of the semiconductor substrate of the second region. | ||
| 地址 | Tokyo JP | ||