发明名称 Power switch driving circuits and switching mode power supply circuits thereof
摘要 In one embodiment, a power switch driving circuit can include: (i) a first circuit configured receiving a control signal, and controlling a first transistor gate, where a first transistor source is coupled to a power supply, and a first transistor drain is coupled to a driving signal configured to control a power switch; (ii) a second circuit configured to receive the control signal, and to control a second transistor gate, where a second transistor source is coupled to ground, and a second transistor drain is coupled to the driving signal; and (iii) a driving enhancement circuit having a third transistor and a first inverter that is configured to invert an output of the first circuit to control a third transistor gate, where a third transistor source is coupled to the driving signal, and a third transistor drain is coupled to the power supply.
申请公布号 US8860472(B2) 申请公布日期 2014.10.14
申请号 US201313868830 申请日期 2013.04.23
申请人 Silergy Semiconductor Technology (Hangzhou) Ltd 发明人 Yuan Xiaolong
分类号 H03K3/00;H03K17/06 主分类号 H03K3/00
代理机构 代理人 Stephens, Jr. Michael C.
主权项 1. A power switch driving circuit, comprising: a) a first circuit configured to receive a control signal, and to control a gate of a first transistor, wherein a source of said first transistor is coupled to an input power supply, and a drain of said first transistor is coupled to a driving signal that is configured to control a power switch based on said control signal, said first circuit comprising a first level shifter configured to receive said control signal and a first inverter configured to invert an output from said first level shifter, to provide said control for said gate of said first transistor; b) a second circuit configured to receive said control signal, and to control a gate of a second transistor to execute an opposite switching action from that of said first transistor, wherein a source of said second transistor is coupled to ground, and a drain of said second transistor is coupled to said driving signal; and c) a driving enhancement circuit having a third transistor and a second inverter, wherein said second inverter is configured to invert an output of said first circuit to control a gate of said third transistor, wherein a source of said third transistor is coupled to said driving signal, and a drain of said third transistor is coupled to said input power supply.
地址 Hangzhou CN