| 摘要 |
PROBLEM TO BE SOLVED: To provide a reference clock switching circuit that prevents a PLL circuit from unlocking when a reference clock is switched.SOLUTION: A reference clock switching circuit 10 includes: a switching clock generation section 11 for generating a phase division number of switching clocks different in phase by a switching phase difference from Reference clock 1; a switching clock selection section 12 for comparing a phase of each of the phase division number of switching clocks with a phase of Reference clock 2 and selecting the switching clock that is closest in phase to Reference clock 2; a clock switching section 13 for, after outputting the switching clock that is closest in phase to Reference clock 2 to the PLL circuit for a phase retention time, repeatedly outputting one other switching clock earlier in phase by the switching phase difference to the PLL circuit for the phase retention time, until the switching clock matches Reference clock 1 in phase; and a phase division number setting section 14 for determining the switching phase difference and the phase division number. |
