| 发明名称 |
PROGRAMMABLE IMPEDANCE MEMORY ELEMENTS AND CORRESPONDING METHODS |
| 摘要 |
A memory element programmable between different impedance states can include a first electrode; a switching layer formed in contact with the first electrode and including at least one metal oxide; and a buffer layer in contact with the switching layer. A buffer layer can include a first metal, tellurium, a third element, and a second metal distributed within the buffer layer. A second electrode can be in contact with the buffer layer. |
| 申请公布号 |
US2014293676(A1) |
申请公布日期 |
2014.10.02 |
| 申请号 |
US201414195787 |
申请日期 |
2014.03.03 |
| 申请人 |
ADESTO TECHNOLOGIES CORPORATION |
发明人 |
Lee Wei Ti;Wang Janet;Gopalan Chakravarthy;Shields Jeffrey Allan;Ma Yi;Tsai Kuei Chang;Sanchez John;Jameson John Ross;Van Buskirk Michael;Gopinath Venkatesh P. |
| 分类号 |
H01L45/00;G11C13/00 |
主分类号 |
H01L45/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A memory element programmable between different impedance states, comprising:
a first electrode; a switching layer formed in contact with the first electrode and including at least one metal oxide; a buffer layer in contact with the switching layer and comprising
a first metal,tellurium,a third element, anda second metal distributed within the buffer layer; and a second electrode in contact with the buffer layer. |
| 地址 |
Sunnyvale CA US |
