发明名称 SENSE AMPLIFIER CIRCUIT AND SEMICONDUCTOR DEVICE
摘要 A single-ended sense amplifier circuit of the invention comprises first and second MOS transistors and first and second precharge circuits. The first MOS transistor drives the bit line to a predetermined voltage and switches connection between the bit line and a sense node and the second MOS transistor whose gate is connected to the sense node amplifies the signal via the first MOS transistor. The first precharge circuit precharges the bit line to a first potential and the second precharge circuit precharges the sense node to a second potential. Before sensing operation, the bit line is driven to the predetermined voltage when the above gate voltage is controlled to decrease. The predetermined voltage is appropriately set so that a required voltage difference at the sense node between high and low levels can be obtained near a changing point between charge transfer/distributing modes.
申请公布号 US2014293721(A1) 申请公布日期 2014.10.02
申请号 US201414306293 申请日期 2014.06.17
申请人 KAJIGAYA Kazuhiko;YOSHIDA Soichiro;YAMADA Yasutoshi 发明人 KAJIGAYA Kazuhiko;YOSHIDA Soichiro;YAMADA Yasutoshi
分类号 G11C11/4091 主分类号 G11C11/4091
代理机构 代理人
主权项 1. A method for reading data in a dynamic random access memory comprising the steps of: precharging a bit line to a first potential; precharging a sense node to a second potential higher than the first potential; controlling a gate of a charge transfer transistor connected between the bit line and the sense node to a third potential higher than the first potential; driving a word line to turn on a memory cell selection transistor to connect a memory cell capacitor to the bit line; transferring charge from the sense node to the bit line by charge transfer mode; and distributing charge between the sense node and the bit line by charge distributing mode.
地址 Tokyo JP