发明名称 APPARATUS OF GENERATING A TRANSMISSION CLOCK IN A DOWNSTREAM DEVICE
摘要 The present invention relates to a semiconductor device and, more specifically, to an apparatus to generate a transmission clock in a downstream device of a bidirectional interface. An embodiment according to an aspect of the present invention provides the apparatus to generate a transmission clock in a downstream device. The apparatus to generate a transmission clock in a downstream device includes: a digital phase detector disposed in a receiver to detect a phase difference between a received clock and a restored clock; a time-digital converter disposed in the receiver to generate a digital control oscillator code using the phase difference detected by the digital phase detector; a first digital control oscillator disposed in the receiver to output the restored clock using the digital control oscillator code; a second digital control oscillator disposed in a transmitter to output the transmission clock using the digital control oscillator code; a lock detector which compares the received clock with the restored clock to output a locking detection signal indicating whether the first digital control oscillator is locked; and a transmission clock setter to provide the digital control oscillator code to the second digital control oscillator when the locking detection signal is outputted.
申请公布号 KR20140116359(A) 申请公布日期 2014.10.02
申请号 KR20140053363 申请日期 2014.05.02
申请人 DOESTEK 发明人 SHIN, DAE JUNG;KIM, TAE JIN
分类号 H04L7/02;H03L7/08 主分类号 H04L7/02
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