SCAN CIRCUIT HAVING FIRST SCAN FLIP-FLOPS AND SECOND SCAN FLIP-FLOPS

摘要

A scan circuit includes first scan flip-flops each including a first logic circuit to receive a plurality of control signals in addition to a scan input signal and a data input signal, and second scan flip-flops each including a second logic circuit to receive the plurality of control signals in addition to a scan input signal and a data input signal, wherein the first scan flip-flops and the second scan flip-flops are connected in series, and the plurality of control signals include only a one-bit reset signal and control signals whose purpose is other than an initialization purpose, and wherein the plurality of control signals are set to a predetermined combination of logic values to cause each of the first scan flip-flops to be initialized to “0” by the first logic circuit and each of the second scan flip-flops to be initialized to “1” by the second logic circuit.

主权项

1. A scan circuit, comprising:
a plurality of first scan flip-flops each including a first logic circuit and each configured to receive a plurality of control signals in addition to a scan input signal and a data input signal that are to be latched; and a plurality of second scan flip-flops each including a second logic circuit and each configured to receive the plurality of control signals in addition to a scan input signal and a data input signal that are to be latched, wherein the first scan flip-flops and the second scan flip-flops are connected in series, and the plurality of control signals include only a one-bit reset signal and control signals whose purpose is other than an initialization purpose, and wherein the plurality of control signals are set to a predetermined combination of logic values to cause each of the first scan flip-flops to be initialized to “0” by the first logic circuit and to cause each of the second scan flip-flops to be initialized to “1” by the second logic circuit.