| 发明名称 |
Multi-Gate and Complementary Varactors in FinFET Process |
| 摘要 |
A varactor includes at least one semiconductor fin, a first gate, and a second gate physically disconnected from the first gate. The first gate and the second gate form a first FinFET and a second FinFET, respectively, with the at least one semiconductor fin. The source and drain regions of the first FinFET and the second FinFET are interconnected to form the varactor. |
| 申请公布号 |
US2014264628(A1) |
申请公布日期 |
2014.09.18 |
| 申请号 |
US201313801089 |
申请日期 |
2013.03.13 |
| 申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Lin Chi-Hsien;Lu Ying-Ta;Liao Hsien-Yuan;Chen Ho-Hsiang;Jou Chewn-Pu;Hsueh Fu-Lung |
| 分类号 |
H01L27/088 |
主分类号 |
H01L27/088 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A varactor comprising:
at least one semiconductor fin; a first gate; and a second gate physically disconnected from the first gate, wherein the first gate and the second gate form a first FinFET and a second FinFET, respectively, with the at least one semiconductor fin, and wherein source and drain regions of the first FinFET and the second FinFET are interconnected to form the varactor. |
| 地址 |
Hsin-Chu TW |
