Semiconductor structure and method of manufacturing the same

摘要

The present invention provides a semiconductor structure comprising a substrate, a gate stack, a sidewall, a base region, source/drain regions, and a support structure, wherein: the base region is located above the substrate, and is separated from the substrate by the void; said support structure is located on both sides of the void, in which part of the support isolation structure is connected with the substrate; the gate stack is located above the base region, said sidewall surrounding the gate stack; said source/drain regions are located on both sides of the gate stack, the base region and the support isolation structure, in which the stress in the source/drain regions first gradually increases and then gradually decreases along the height direction from the bottom. The present invention also provides a manufacturing method for the semiconductor structure. The present invention is beneficial to suppress the short channel effect, as well as to provide an optimum stress to the channel.

主权项

1. A manufacturing method for a semiconductor structure, comprising:
a) providing a substrate, wherein a first semiconductor layer is formed on the substrate, a second semiconductor layer is formed on the first semiconductor layer, and a gate stack and a first spacer surrounding the gate stack are formed on the second semiconductor layer; b) removing the second semiconductor layer on both sides of the gate stack to form a device stack; c) forming a second spacer on both sides of the device stack, and removing a portion of the first semiconductor layer on both sides of the device stack to retain the first semiconductor layer of a certain thickness; d) in a part of a region along a width direction of the device stack, removing the first semiconductor layer on both sides of the device stack so as to expose the substrate; e) in the part of the region along the width direction of the device stack, forming a support isolation structure connected with the substrate below the second spacer and edges of both sides of the device stack; f) removing the remaining first semiconductor layer to form a void (112) below the device stack; and g) removing the second spacer, and forming source/drain regions on opposite sides of the device stack, wherein stress in the source/drain regions first gradually increases and then gradually decreases along a height direction from the bottom.