发明名称 FAST, LOW POWER COMPARATOR WITH DYNAMIC BIAS BACKGROUND
摘要 <p>A comparator circuit comprising an operational amplifier configured to compare a difference between a switching voltage and a reference voltage, and a dynamically adjustable bias current generator coupled to the operational amplifier. A method of conserving power in a comparator circuit includes estimating a switching regulator load current value, communicating the value to a current bias generator, enabling the bias generator with a signal from a switching regulator PFM logic circuit, and establishing a bias current at an operational amplifier of the comparator circuit on the basis of the enabling.</p>
申请公布号 WO2014130344(A1) 申请公布日期 2014.08.28
申请号 WO2014US16308 申请日期 2014.02.13
申请人 QUALCOMM INCORPORATED 发明人 DHANASEKARAN, VIJAYAKUMAR
分类号 H02M3/156 主分类号 H02M3/156
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