发明名称 INFORMATION PROCESSING SYSTEM
摘要 PROBLEM TO BE SOLVED: To solve the problem of shortage in rewriting resistance that is caused when caching data whose read-access frequency is low and rewriting frequency is high to elevate a cache hit ratio while using a nonvolatile memory having a low rewriting resistance for read caching. ! SOLUTION: A nonvolatile memory having a high writing resistance is arranged between a volatile memory and a nonvolatile memory having a low resistance capability in a read caching structure. Read-access frequencies to data in the superior volatile memory and the intermediate nonvolatile memory having the high rewriting resistance are monitored. The data storage areas of the superior volatile memory, the intermediate nonvolatile memory having the high rewriting resistance and the interior nonvolatile memory having the low rewriting resistance are controlled in a stepwise manner according to the level of each read access frequency. ! COPYRIGHT: (C)2014,JPO&INPIT
申请公布号 JP2014153969(A) 申请公布日期 2014.08.25
申请号 JP20130024000 申请日期 2013.02.12
申请人 HITACHI LTD 发明人 KANEKO ISAMU ; TSUKITO TETSUJI ; SHIRAKAWA TAKAHIKO ; NARUSE YUKINORI
分类号 G06F12/08;G06F3/06 主分类号 G06F12/08
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