TRANSISTORS WITH ISOLATION REGIONS

摘要

A transistor device is described that includes a source, a gate, a drain, a semiconductor material which includes a gate region between the source and the drain, a plurality of channel access regions in the semiconductor material on either side of the gate, a channel in the semiconductor material having an effective width in the gate region and in the channel access regions, and an isolation region in the gate region. The isolation region serves to reduce the effective width of the channel in the gate region without substantially reducing the effective width of the channel in the access regions. Alternatively, the isolation region can be configured to collect holes that are generated in the transistor device. The isolation region may simultaneously achieve both of these functions.

主权项

1. A transistor device comprising:
a source, a gate, and a drain; a III-N semiconductor material which includes a gate region between the source and the drain; a plurality of channel access regions in the III-N semiconductor material that are between the source and the gate and between the drain and the gate, respectively; a channel in the III-N semiconductor material having an effective width in the gate region and in the channel access regions; and a plurality of isolation regions in the gate region; wherein each of the plurality of isolation regions has a width, and a sum of the widths of the isolation regions is between 10% and 90% a width of the source.