| 摘要 |
A computing device (301) comprises at least one memory controller (124) and a first (305) and a second (304) sub-computing device. Sub-computing device (305) comprises at least one bus; and at least one bus-master. Sub-computing device (304) comprises at least one bus (101); and at least two bus-masters (112, 113, 114), in which at least two of (112, 113,114) can concurrently issue memory transfer requests. At least one regulating apparatus (303) is connected: by a first port to a bus (301) of (305); by a second port to a bus (101) of (304); and to at least one memory controller (124). That regulating apparatus (303) determines which, if any, of the memory transfer requests to grant on the basis of a process comprising determining the priority of any memory transfer request received on its first port relative to the priorities of any memory transfer requests received on its other ports. |
