发明名称 MEMORY CIRCUITS AND ROUTING OF CONDUCTIVE LAYERS THEREOF
摘要 A memory circuit memory circuit comprises at least one memory cell for storing a datum. The memory cell is coupled with a word line, a bit line, a bit line bar, a first voltage line, and a second voltage line. A first conductive layer comprising a first landing pad and a second landing pad is arranged at a first level. A second conductive layer is coupled to the first conductive layer and arranged at a second level different from the first level. The second conductive layer is routed to define the first voltage line and the second voltage line. A third conductive layer is coupled to the second conductive layer and arranged at a third level different from the first level and the second level. The third conductive layer is routed to define the word line.
申请公布号 US2014232009(A1) 申请公布日期 2014.08.21
申请号 US201414259585 申请日期 2014.04.23
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 LIAW Jhon Jhy
分类号 H01L23/50 主分类号 H01L23/50
代理机构 代理人
主权项 1. A memory circuit, comprising: at least one memory cell for storing a datum, the memory cell being coupled with a word line, a bit line, a bit line bar, a first voltage line, and a second voltage line; a first conductive layer arranged at a first level, the first conductive layer comprising a first landing pad and a second landing pad; a second conductive layer coupled to the first conductive layer and arranged at a second level different from the first level, the second conductive layer being routed to define the first voltage line and the second voltage line; and a third conductive layer coupled to the second conductive layer and arranged at a third level different from the first level and the second level, the third conductive layer being routed to define the word line, wherein the bit line is disposed adjacent to the first landing pad and the bit line bar is disposed adjacent to the second landing pad.
地址 Hsinchu TW