发明名称
摘要 A non-volatile memory core comprises one or more memory bays. Each memory bay comprises one or more memory blocks that include a grouping of non-volatile storage elements. In one embodiment, memory blocks in a particular memory bay share a group of read/write circuits. During a memory operation, memory blocks are transitioned into active and inactive states. The process of transitioning blocks from an inactive state to an active state includes enabling charge sharing between a memory block entering the active state and another memory block that was previously in the active state. This charge sharing improves performance and/or reduces energy consumption for the memory system.
申请公布号 JP5575243(B2) 申请公布日期 2014.08.20
申请号 JP20120524764 申请日期 2010.08.06
申请人 发明人
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
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