发明名称 Semiconductor integrated circuit apparatus and radio-frequency power amplifier module
摘要 In a semiconductor integrated circuit apparatus and a radio-frequency power amplifier module, a log detection portion including multiple-stage amplifier circuits, multiple level detection circuits, adder circuits, and a linear detection portion including a level detection circuit are provided. Output current from the log detection portion and output current from the linear detection portion are multiplied by different coefficients and the results of the multiplication are added to each other to realize the multiple detection methods. For example, current resulting from multiplication of the output current from the log detection portion by ×6/5 is added to the output current from the linear detection portion to realize a log detection method and, current resulting from multiplication of the output current from the log detection portion by ×⅕ is added to current resulting from multiplication of the output current from the linear detection portion by ×3 to realize a log-linear detection method.
申请公布号 US8810285(B2) 申请公布日期 2014.08.19
申请号 US201314026076 申请日期 2013.09.13
申请人 Murata Manufacturing Co., Ltd. 发明人 Shimamune Yusuke;Yoshizaki Yasunobu;Hayashi Norio;Tsutsui Takayuki
分类号 H03F3/45;H04B1/04;H03F3/16;H03G3/30;H03F3/195;H03F3/68;H04W52/52;H03F3/24;H03F3/72;H03F3/21 主分类号 H03F3/45
代理机构 Keating & Bennett, LLP 代理人 Keating & Bennett, LLP
主权项 1. A semiconductor integrated circuit apparatus comprising: N-number first amplifier circuits that receive a first power signal, that are cascade-connected in order from a first stage circuit to an N-th stage circuit, and that have a first gain; N-number first level detection circuits that are provided for the N-number first amplifier circuits and that output currents in accordance with output levels of the first stage circuit to the N-th stage circuit of the N-number first amplifier circuits; a first adder circuit that adds the output currents from the N-number first level detection circuits to each other to output a first current resulting from addition performed by the first adder circuit; a second level detection circuit that receives the first power signal and outputs a second current in accordance with a level of the first power signal; a synthesizer circuit that generates a third current resulting from multiplication of the first current by a first value and a fourth current resulting from multiplication of the first current by a second value lower than the first value and generates a fifth current resulting from multiplication of the second current by a third value and a sixth current resulting from multiplication of the second current by a fourth value lower than the third value to output current resulting from addition of either of the third current and the fourth current to either of the fifth current and the sixth current; and a current-voltage conversion circuit that converts the output current from the synthesizer circuit into voltage.
地址 Kyoto JP