发明名称 METHOD OF FORMING VIA HOLE AND METHOD OF MANUFACTURING MULTILAYER PRINTED WIRING BOARD
摘要 <p>PROBLEM TO BE SOLVED: To provide a technique for manufacturing a multilayer printed wiring board by forming a metal foil with carbon dioxide gas laser directly and forming a via hole in an insulating layer immediately below, without forming a window in the metal foil (conductor layer), and without roughening the metal foil surface.SOLUTION: A method for forming a via hole 9 in a multilayer printed wiring board 20 including more than one conductor layers 1, 1' in which the conductor layers 1, 1' and an insulating layer 2 are laminated alternately comprises: a step of coating the conductor layer of the outermost surface with a pattern of a paste material 3 absorbing carbon dioxide gas laser light; and a step of forming a via hole by irradiating the paste material 3 with the carbon dioxide gas laser light, and removing the conductor layer 1 of the outermost surface and the insulating layer 2 on the underside thereof, so as to expose the conductor layer 1' on the underside of the insulating layer 2. A method of manufacturing a multilayer printed wiring board 20 using the method for forming a via hole is also provided.</p>
申请公布号 JP2014143237(A) 申请公布日期 2014.08.07
申请号 JP20130009233 申请日期 2013.01.22
申请人 TOPPAN PRINTING CO LTD 发明人 HITSUOKA YOSHIYUKI
分类号 H05K3/42;H05K3/00;H05K3/46 主分类号 H05K3/42
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