System and method for electronic testing of partially processed devices

摘要

Systems and methods are provided for testing partially completed three-dimensional ICs. Example methods may incorporate one or more of the following features: design for testing (DFT); design for partial wafer test; design for partial probing; partial IC probecards; partial IC test equipment; partial IC quality determinations; partial IC test optimization; and partial test optimization. Other aspects may also be included. Systems and methods incorporating these features to test partially completed three-dimensional ICs may result in saved time and effort, and less scraped material, as the partial device is not built any further when a bad partial device is detected. This results in lower costs and higher yield.

主权项

1. A partially assembled three-dimensional integrated circuit (3DIC), comprising: a plurality of individual integrated circuits (IC) that are stacked on each other, and one or more design for testing means (DFT means) applied to one or more of the plurality of individual ICs, the DFT means being adapted to permit the 3DIC to be tested while it is partially assembled.