发明名称 SEMICONDUCTOR APPARATUS AND STACKED SEMICONDUCTOR APPARATUS FOR CHECKING FORMATION AND CONNECTION OF THROUGH SILICON VIA
摘要 A semiconductor apparatus includes a TSV formed to be electrically connected with another chip and a TSV test unit configured to check a capacitance component of the TSV to generate a TSV abnormality signal.
申请公布号 US2014209907(A1) 申请公布日期 2014.07.31
申请号 US201414216265 申请日期 2014.03.17
申请人 SK hynix Inc. 发明人 JEONG Chun Seok;LEE Jae Jin
分类号 H01L21/66 主分类号 H01L21/66
代理机构 代理人
主权项 1. A stacked semiconductor apparatus comprising: a first chip having a first TSV connected between a first node and a second node; a second chip having a second TSV connected between a third node and a fourth node; and a connection unit configured to electrically connect the second node and the third node with each other, wherein the first chip includes a first TSV test unit configured to check a capacitance value of the first TSV and generate a first single test result in a single TSV test mode, and supply a power supply voltage to the first node in a stacked TSV test mode, and wherein the second chip includes a second TSV test unit configured to check a capacitance value of the second TSV and is generate a second single test result in the single TSV test mode, and electrically connect the third node and a fifth node with each other in the stacked TSV test mode.
地址 Icheon-si KR