PLL FREQUENCY SYNTHESIZER

摘要

PROBLEM TO BE SOLVED: To suppress the generation of phase noise at high frequency signal output.SOLUTION: A fixed frequency oscillator 15 with a center frequency set at 1/2 of a desired frequency is newly provided, and a center frequency of a voltage-controlled oscillator 13 is also set at 1/2 of the desired frequency. Outputs from the voltage-controlled oscillator 13 and the fixed frequency oscillator 15 are multiplied and only a sum frequency component is input into a variable frequency divider 14 that provides a feedback input to a frequency/phase comparator 11. The outputs from the voltage-controlled oscillator 13 and the fixed frequency oscillator 15 are also multiplied and only a high frequency component is output as an output signal from a PLL frequency synthesizer 1.