发明名称 PROGRAMMABLE LOGIC DEVICE
摘要 <p>In the present invention, a programmable logic device has the following: a plurality of programmable logic units (103) for beginning task processing when a task instruction signal is input, and outputting a task completion signal when the task processing completes; a plurality of programmable synchronization control cells (911-913) that, using a look-up table, output the task instruction signal in accordance with the task completion signal; a programmable network (1001) for connecting the plurality of programmable logic units and the plurality of programmable synchronization control units; and a processing core for performing task processing and management. The programmable synchronization control cells receive input, from the programmable network, of at least either the task completion signal or the task instruction signal, and output the task instruction signal to the programmable logic unit via the programmable network.</p>
申请公布号 WO2014112082(A1) 申请公布日期 2014.07.24
申请号 WO2013JP50851 申请日期 2013.01.17
申请人 FUJITSU LIMITED 发明人 SUGIYAMA, IWAO
分类号 G06F15/80;G06F11/00;G06F15/173;H01L21/82 主分类号 G06F15/80
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