Pixel circuit and display device

摘要

A display device which realizes constant display having multiple tones with low power consumption is provided. A pixel circuit 2 has an internal node N1 holding a pixel data voltage applied to a display element unit 21, a first switch circuit 22 transferring the pixel data voltage supplied from a data signal line SL to the internal node N1 through a series circuit of first and second transistor elements T1 and T2, a second circuit 23 having a third transistor element T3 which communicates between an intermediate node N2 connected with the first and second transistor elements T1 and T2, and a voltage supply line VSL, and a control circuit 24 formed with a series circuit of a fourth transistor element T4 and a first capacitative element C1, holding the pixel data voltage held in the internal node N1 at one end of the first capacitative element C1 through the fourth transistor element T4, and controlling conduction of the third transistor element T3 by a boost voltage applied to the other end of the first capacitative element C1, and the first and second transistor elements T1 and T2 are controlled individually.

主权项

1. A pixel circuit comprising:
a display element unit including a unit liquid crystal display element; an internal node forming part of the display element unit and holding a pixel data voltage applied to the display element unit; a first switch circuit including a series circuit of first and second transistor elements, having one end connected with a data signal line and the other end connected with the internal node, and transferring to the internal node the pixel data voltage supplied from the data signal line through the series circuit; a second switch circuit including a third transistor element, and having one end connected with a predetermined voltage supply line and the other end connected with an intermediate node which is a connection point where the first and second transistor elements in the series circuit are connected in series; and a control circuit formed with a series circuit of a fourth transistor element and a first capacitative element, holding the pixel data voltage held in the internal node, at one end of the first capacitative element through the fourth transistor element, and controlling conduction of the third transistor element by a boost voltage applied to the other end of the first capacitative element, wherein each of the first to fourth transistor elements includes a first terminal, a second terminal and a control terminal that controls conduction between the first and second terminals, the control terminal of the first transistor element is connected with a first scan signal line setting the first transistor element to a conducted state upon an operation of transferring the pixel data voltage to the internal node, the control terminal of the second transistor element is connected with a second scan signal line setting the second transistor element to a conducted state upon an operation of transferring the pixel data voltage to the internal node, the control terminal of the third transistor element, the second terminal of the fourth transistor element, and the one end of the first capacitative element are connected to each other, and form an output node of the control circuit, the first terminal of the fourth transistor element is connected with the internal node, the control terminal of the fourth transistor element is connected with a first control line, the other end of the first capacitative element is connected with a second control line supplying the boost voltage, upon a self-refresh operation of compensating for voltage fluctuation of the pixel data voltage held in the internal node, using a voltage held in the output node, a first control voltage equal to or more than a maximum voltage of the pixel data voltage held in the internal node is applied to the voltage supply line, a voltage setting the first transistor element to a non-conducted state is applied to the first scanning line, and a voltage setting the second transistor element to a conducted state is applied to the second scanning line, and, in a state where the internal node and the output node have the same potential through the fourth transistor element, the fourth transistor element transitions from a conducted state to a non-conducted state, and thereafter the boosting voltage is applied to the other end of the first capacitative element, thereby boosting the voltage of the output node to a second control voltage obtained by adding a threshold voltage of the third transistor element to the pixel data voltage held in the internal node.