发明名称 |
ERROR PROTECTION FOR A DATA BUS |
摘要 |
A system for providing error detection or correction on a data bus includes one or more caches coupled to a central processing unit and to a hub by one or more buses. The system also includes a plurality of arrays, each array disposed on one of the buses. Each of the arrays includes a plurality of storage cells disposed in an insensitive direction and an error control mechanism configured to detect an error in the plurality of storage cells. |
申请公布号 |
US2014201606(A1) |
申请公布日期 |
2014.07.17 |
申请号 |
US201313741599 |
申请日期 |
2013.01.15 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
Huott William V.;Kark Kevin W.;Massey John G.;Muller K. Paul;Rude David L.;Wolpert David S. |
分类号 |
G06F11/08 |
主分类号 |
G06F11/08 |
代理机构 |
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代理人 |
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主权项 |
1. A system for providing error detection or correction on a data bus, the system comprising:
one or more caches, wherein each cache is coupled to a central processing unit and to a hub by one or more buses; and a plurality of arrays, each array disposed on one of the one or more buses, wherein each of the arrays comprises:
a plurality of storage cells disposed in an insensitive direction; andan error control mechanism configured to detect an error in the plurality of storage cells. |
地址 |
Armonk NY US |