| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a reference signal generation circuit, an AD conversion circuit and an imaging device that reduce the number of higher order current source cells.SOLUTION: A clock generation section 10 has a delay section having a plurality of delay units for outputting delayed versions of an input signal, and outputs a lower phase signal based on the signals output from the delay section. A higher order current source cell section 11 has higher order current source cells for generating the same constant current. A lower order current source cell section 12 has a plurality of lower order current source cells weighted to generate constant currents of current values different by a predetermined proportion of the current value of the constant current generated by the higher order current source cells. The higher order current source cells are selected on the basis of a clock that is a frequency division of clocks based on the lower phase signal, and the lower order current source cells are selected on the basis of pulses generated at time intervals based on the period of the clock used to select the higher order current source cells which are generated at timings based on rises or falls of the clocks based on the lower phase signal.</p> |
