发明名称 INSTRUCTION AND LOGIC TO PROVIDE SIMD SECURE HASHING ROUND SLICE FUNCTIONALITY
摘要 Instructions and logic provide SIMD secure hashing round slice functionality. Some embodiments include a processor comprising: a decode stage to decode an instruction for a SIMD secure hashing algorithm round slice, the instruction specifying a source data operand set, a message-plus-constant operand set, a round-slice portion of the secure hashing algorithm round, and a rotator set portion of rotate settings. Processor execution units, are responsive to the decoded instruction, to perform a secure hashing round-slice set of round iterations upon the source data operand set, applying the message-plus-constant operand set and the rotator set, and store a result of the instruction in a SIMD destination register. One embodiment of the instruction specifies a hash round type as one of four MD5 round types. Other embodiments may specify a hash round type by an immediate operand as one of three SHA-1 round types or as a SHA-2 round type.
申请公布号 US2014189368(A1) 申请公布日期 2014.07.03
申请号 US201213731004 申请日期 2012.12.29
申请人 Wolrich Gilbert M.;Gopal Vinodh;Yap Kirk S. 发明人 Wolrich Gilbert M.;Gopal Vinodh;Yap Kirk S.
分类号 G06F21/60 主分类号 G06F21/60
代理机构 代理人
主权项 1. A processor comprising: a decode stage to decode a first instruction for a SIMD secure hashing algorithm round slice, the first instruction specifying a source data operand set, a message-plus-constant operand set, a round-slice portion of the secure hashing algorithm round, and a rotator set portion of rotate settings; and one or more execution units, responsive to the decoded first instruction, to: perform a secure hashing round-slice set of round iterations upon the source data operand set, applying the message-plus-constant operand set and the rotator set; andstore a result of the first instruction in a SIMD destination register.
地址 Framingham MA US