Composite semiconductor device

摘要

This composite semiconductor device has a normally-on first field effect transistor and a normally-off second field effect transistor connected in series between first and second terminals, gates of the first and second field effect transistors being connected to second and third terminals, respectively, and N diodes being connected in series in a forward direction between a drain and a source of the second field effect transistor. Therefore, a drain-source voltage (Vds) of the second field effect transistor can be restricted to a voltage not higher than a withstand voltage of the second field effect transistor.

主权项

1. A composite semiconductor device, comprising:
a first terminal receiving a first voltage; a second terminal receiving a second voltage lower than said first voltage; a third terminal selectively provided with any one of a third voltage and a fourth voltage higher than the third voltage; a normally-on first field effect transistor having a drain connected to said first terminal and a gate connected to said second terminal; a normally-off second field effect transistor having a drain connected to a source of said first field effect transistor, a source connected to said second terminal, and a gate connected to said third terminal, rendered non-conductive when said third voltage is provided to said third terminal, and rendered conductive when said fourth voltage is provided to said third terminal; and a protection circuit connected in parallel to said second field effect transistor, for protecting said second field effect transistor by maintaining a voltage across the drain and the source of said second field effect transistor to a voltage not higher than a withstand voltage of said second field effect transistor, said protection circuit including N (N being a natural number) unipolar rectifier elements connected in series between the drain and the source of said second field effect transistor in a forward direction and rendered conductive when a voltage across the drain and the source of said second field effect transistor exceeds a predetermined voltage not higher than a withstand voltage of said second field effect transistor.