| 发明名称 |
METHODS AND APPARATUS RELATED TO PROCESSOR SLEEP STATES |
| 摘要 |
A system includes a processor including at least a first core and a local interrupt controller associated with the first core. The first core is operable to store its architectural state prior to entering a first core sleep state, and the processor is operable to receive and implement a request for entering a system sleep state in which the first core is in the first core sleep state and the local interrupt controller is powered down and exit the system sleep state by restoring the local interrupt controller and restoring the saved architectural state of the first core. |
| 申请公布号 |
US2014181557(A1) |
申请公布日期 |
2014.06.26 |
| 申请号 |
US201213725014 |
申请日期 |
2012.12.21 |
| 申请人 |
Branover Alexander J.;Lueck Andrew W.;Kitchin Paul E.;Kaplan David A. |
发明人 |
Branover Alexander J.;Lueck Andrew W.;Kitchin Paul E.;Kaplan David A. |
| 分类号 |
G06F1/32 |
主分类号 |
G06F1/32 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A system, comprising:
a processor comprising:
at least a first core; anda local interrupt controller associated with the first core,wherein the first core is operable to store its architectural state prior to entering a first core sleep state, andwherein the processor is operable to receive and implement a request for entering a system sleep state in which the first core is in the first core sleep state and the local interrupt controller is powered down and exit the system sleep state by restoring the local interrupt controller and restoring the saved architectural state of the first core. |
| 地址 |
Chestnut Hill MA US |
