Etch stop layer formation in metal gate process

摘要

A method of forming a semiconductor device that includes forming a metal gate conductor of a gate structure on a channel portion of a semiconductor substrate. A gate dielectric cap is formed on the metal gate conductor. The gate dielectric cap is a silicon oxide that is catalyzed by a metal element from the gate conductor so that edges of the gate dielectric cap are aligned with a sidewall of the metal gate conductor. Contacts are then formed to at least one of a source region and a drain region that are on opposing sides of the gate structure, wherein the gate dielectric cap obstructs the contacts from contacting the metal gate conductor.

主权项

1. A method of forming a semiconductor device comprising:
forming a metal gate conductor of a gate structure on a channel portion of a semiconductor substrate, wherein the metal gate conductor is comprised of a catalytic metal; forming a gate dielectric cap on the metal gate conductor with an atomic layer deposition process that includes only half reactions of a silanol containing precursor, the gate dielectric cap comprised of at least silicon and oxygen, wherein the gate dielectric cap is catalyzed by the catalytic metal so that edges of the gate dielectric cap are aligned with a sidewall of the metal gate conductor, wherein the thickness of the gate dielectric cap is self limited to less than 20 nm; and forming contacts to at least one of a source region and a drain region that are on opposing sides of the gate structure, wherein the gate dielectric cap obstructs the contacts from contacting the metal gate conductor.