发明名称 PLACING TRANSISTORS IN PROXIMITY TO THROUGH-SILICON VIAS
摘要 Roughly described, the invention involves ways to characterize, take account of, or take advantage of stresses introduced by TSV's near transistors. The physical relationship between the TSV and nearby transistors can be taken into account when characterizing a circuit. A layout derived without knowledge of the physical relationships between TSV and nearby transistors, can be modified to do so. A macrocell can include both a TSV and nearby transistors, and a simulation model for the macrocell which takes into account physical relationships between the transistors and the TSV. A macrocell can include both a TSV and nearby transistors, one of the transistors being rotated relative to others. An IC can also include a transistor in such proximity to a TSV as to change the carrier mobility in the channel by more than the limit previously thought to define an exclusion zone.
申请公布号 US2014173545(A1) 申请公布日期 2014.06.19
申请号 US201414188532 申请日期 2014.02.24
申请人 Synopsys, Inc. 发明人 Sproch James David;Moroz Victor;Xu Xiaopeng;Karmarkar Aditya Pradeep
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A computer readable medium storing in a non-transitory manner, data and computer instructions which when executed by a processor cause a computer system to make: a layout for a circuit, the layout including a TSV and a first transistor electrically connected to the TSV; and a simulation model of the circuit that takes into account a distance of the first transistor to the TSV, wherein the first transistor is disposed in such proximity to the TSV as to change the carrier mobility in the channel of the first transistor by more than 5% compared to the carrier mobility in the absence of the TSV.
地址 Mountain View CA US
您可能感兴趣的专利