发明名称 |
CIRCUIT CONFIGURATION AND MANUFACTURING PROCESSES FOR VERTICAL TRANSIENT VOLTAGE SUPPRESSOR (TVS) AND EMI FILTER |
摘要 |
A vertical TVS (VTVS) circuit includes a semiconductor substrate for supporting the VTVS device thereon having a heavily doped layer extending to the bottom of substrate. Deep trenches are provided for isolation between multi-channel VTVS. Trench gates are also provided for increasing the capacitance of VTVS with integrated EMI filter. |
申请公布号 |
US2014167218(A1) |
申请公布日期 |
2014.06.19 |
申请号 |
US201213720042 |
申请日期 |
2012.12.19 |
申请人 |
Mallikarjunaswamy Shekar;Bobde Madhur |
发明人 |
Mallikarjunaswamy Shekar;Bobde Madhur |
分类号 |
H01L27/02;H01L23/60;H01L21/02;H01L29/73 |
主分类号 |
H01L27/02 |
代理机构 |
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代理人 |
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主权项 |
1. A vertical transient voltage suppressing (VTVS) device comprising:
a substrate comprising a heavily doped layer extending to a bottom surface of said substrate wherein said heavily doped layer comprising a dopant concentration of a first conductivity type higher than 1E18/cm3.
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地址 |
San Jose CA US |