Programmable duty cycle setter employing time to voltage domain referenced pulse creation

摘要

An improved programmable duty cycle generator and method of operation. In one aspect, the generated output signal duty cycle is not measured, but rather is generated based on a predetermined value. Saw tooth generator/Integrator schemes are used to create the saw type waveforms of the incoming frequency which in conjunction with DAC is used to create the desired duty cycle. The improved programmable duty cycle signal generator for placement in key pinch points of a critical path where precise duty cycle definition is needed.

主权项

1. A programmable duty cycle signal generator comprising:
a first integrator circuit for receiving an input clock signal (CLK); said first integrator circuit creating from said input CLK signal a first linear voltage signal representative of a full time period of said input CLK; a digital to analog converter (DAC) receiving bits representing a programmed output signal duty cycle; a sampling circuit generating a voltage supply signal from said first linear voltage signal for input to said DAC, said DAC using said voltage supply signal and said programmed bits to generate a reference signal voltage representative of the programmed duty cycle; an edge pulse detector detecting an edge of said input CLK to create trigger signal and generating a rising edge of an output signal of the duty cycle signal generator; a second integrator for integrating, in real time, said output signal to create a second linear voltage output signal; a comparator device receiving said reference signal voltage and said second linear voltage output signal and generating a compared output signal at a time said second linear voltage output signal exceeds said reference signal, said compared output signal being used to generate a falling edge of said output signal, said output signal rising and falling edge occurring in each time period at said programmed duty cycle.