Methods and apparatus for calibrating pipeline analog-to-digital converters

摘要

An integrated circuit with a pipeline analog-to-digital (A/D) converter and associated calibration circuitry is provided. The A/D converter may include multiple series-connected pipeline stages at least some of which are implemented using a switched capacitor configuration. The calibration circuitry may include an analog error correction circuit, a digital error correction circuit, and a calibration control circuit for coordinating the operation of the analog and digital error correction circuits. During calibration operations, the analog error correction circuit may be used to suitably adjust a gain setting for each pipeline stage, whereas the digital error correction circuit may be used to compute a code offset value for each pipeline stage. Calibration may proceed from a least-significant-bit pipeline stage towards a most-significant-bit pipeline stage, one stage at a time.

主权项

1. A method for calibrating a data converter on an integrated circuit, comprising:
with calibration circuitry, performing analog calibration operations on the data converter, wherein the data converter includes a plurality of pipeline analog-to-digital converter stages each of which includes a variable gain amplifier having an adjustable gain, and wherein the calibration circuitry adjusts the gain of the variable gain amplifier while performing the analog calibration operations; and with the calibration circuitry, performing digital calibration operations on the data converter, wherein performing the analog calibration operations on the data converter comprises performing coarse calibration on the data converter with a first degree of accuracy, and wherein performing the digital calibration operations on the data converter comprises performing fine calibration on the data converter with a second degree of accuracy that is greater than the first degree to accuracy.