发明名称 TRISTATE CONTROL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a tristate control circuit that has a smaller number of transistors constituting the circuit.SOLUTION: In a tristate control circuit 1 of an embodiment, a PMOS transistor P1 receives a data signal A at a gate terminal, and outputs a control signal CTP to control an output PMOS transistor MP from a drain terminal. An NMOS transistor N1 receives the data signal A at a gate terminal, and outputs a control signal CTN to control an output NMOS transistor MN from a drain terminal. A switch SW1 is connected between the drain terminals of the PMOS transistor P1 and the NMOS transistor N1, a switch SW2 and a switch SW3 are connected between the drain terminal of the PMOS transistor P1 and a supply voltage line and between the drain terminal of the NMOS transistor N1 and a ground potential line, respectively, and the switches SW1, SW2, SW3 are controlled on/off by an enable signal EN for tristate control.
申请公布号 JP2014107771(A) 申请公布日期 2014.06.09
申请号 JP20120260565 申请日期 2012.11.29
申请人 TOSHIBA CORP 发明人 TANAKA YASUNORI;UENO MASAO
分类号 H03K19/0175 主分类号 H03K19/0175
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