MULTILANE SERDES CLOCK AND DATA SKEW ALIGNMENT FOR MULTI-STANDARD SUPPORT

摘要

A communication system may include a number of communication channels operating in accordance with one or more communication standards. The channels may generate data clocks from one or more master clock signals. The phase of the data clocks may be aligned using phase detectors for determining respective phase relationships and using phase interpolators for adjusting respective clock phases. The communication system may include communication channels that operate at different data clock frequencies. These systems may divide their respective data clocks in order to achieve a common clock frequency for use in their phase alignment. The phase detectors and associated circuitry may be disabled to save power when not in use.

主权项

1. A communication system, comprising:
a first communication channel that includes
a first divider configured to generate a first divided clock signal based on a master clock signal, the first divided clock signal configured to clock a first data stream through the first communication channel; and a second communication channel that includes
a phase interpolator configured to receive the master clock signal and generate a first phase adjusted clock signal,a second divider configured to generate a second divided clock signal from the first phase adjusted clock signal, the second divided clock signal configured to clock a second data stream through the second communication channel, anda phase detector configured to determine a phase difference between the first divided clock signal and the second divided clock signal; wherein the phase interpolator is configured to adjust a phase of the first phase adjusted clock signal based on the determined phase difference.