| 摘要 |
The present invention comprises a substrate, a plurality of first directional gate wirings and a plurality of second directional data wirings, a thin film transistor and a pixel electrode, N-data link wirings, a data pad, and a first conductive pattern. The first directional gate wirings and the second directional data wirings are formed on a display area of the substrate and define a pixel area. The thin film transistor and the pixel electrode are formed per the pixel area. The N-data link wirings (N is an even natural number) are formed on a non-display area of the substrate and are connected to one end of the data wirings. The data pad is connected to the data link wirings. The first conductive pattern is overlapped with a K^th data link wiring to a (N-(K-1))^th data link wiring. The overlap area of the first conductive pattern get wider from the K^th data link wiring to an L^th data link wiring. The overlap area of the first conductive pattern get narrower from a (N-(L-1))^th data link wiring to the (N-(K-1)) data link wiring. K and L satisfy 1<K<L<=N/2. |
