| 摘要 |
<p>PROBLEM TO BE SOLVED: To solve the problem wherein it is difficult to reduce power consumption further in a standby mode.SOLUTION: An external terminal receives a clock enable signal. An input circuit (2) uses first and second amplifier circuits (21, 22) connected in parallel to the external terminal to output an internal clock enable signal depending on the clock enable signal. A control section (24, 25) inactivates either of the first and second amplifier circuits for at least a part of a standby period, for which the clock enable signal is inactive.</p> |
