发明名称 Converting conditional short forward branches to computationally equivalent predicated instructions
摘要 <p>A processor is operable to process conditional branches. The processor includes instruction fetch logic to fetch a conditional short forward branch. The conditional short forward branch is to include a conditional branch instruction and a set of one or more instructions that are to sequentially follow the conditional branch instruction in program order. The set of the one or more instructions are between the conditional branch instruction and a forward branch target instruction that is to be indicated by the conditional branch instruction. The processor also includes instruction conversion logic coupled with the instruction fetch logic. The instruction conversion logic is to convert the conditional short forward branch to a computationally equivalent set of one or more predicated instructions. Other processors are also disclosed, as are various methods and systems.</p>
申请公布号 GB201404723(D0) 申请公布日期 2014.04.30
申请号 GB20140004723 申请日期 2014.03.17
申请人 KATHOLIEKE UNIVERSITEIT LEUVEN;LEUVEN;INTEL CORPORATION 发明人
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