发明名称 Heap/stack guard pages using a wakeup unit
摘要 A method and system for providing a memory access check on a processor including the steps of detecting accesses to a memory device including level-1 cache using a wakeup unit. The method includes invalidating level-1 cache ranges corresponding to a guard page, and configuring a plurality of wakeup address compare (WAC) registers to allow access to selected WAC registers. The method selects one of the plurality of WAC registers, and sets up a WAC register related to the guard page. The method configures the wakeup unit to interrupt on access of the selected WAC register. The method detects access of the memory device using the wakeup unit when a guard page is violated. The method generates an interrupt to the core using the wakeup unit, and determines the source of the interrupt. The method detects the activated WAC registers assigned to the violated guard page, and initiates a response.
申请公布号 US8713294(B2) 申请公布日期 2014.04.29
申请号 US20100696817 申请日期 2010.01.29
申请人 GOODING THOMAS M.;SATTERFIELD DAVID L.;STEINMACHER-BUROW BURKHARD;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GOODING THOMAS M.;SATTERFIELD DAVID L.;STEINMACHER-BUROW BURKHARD
分类号 G06F15/00;G06F7/38;G06F9/00;G06F9/44 主分类号 G06F15/00
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