发明名称 HETEROSTRUCTURE TRANSISTOR WITH MULTIPLE GATE DIELECTRIC LAYERS
摘要 <p>A heterostructure semiconductor device includes a first active layer, and a second active layer arranged on the first active layer. A 2D electron gas layer is formed between the first and the second active layer. A first gate dielectric layer is arranged on the second active layer. A second gate dielectric layer is arranged on the first gate dielectric layer. A passivation layer is arranged on the second gate dielectric layer. A gate is extended to the second gate dielectric layer through the passivation layer. A first and a second ohmic contact are electrically connected to the second active layer. The first and the second ohmic contact is arranged between the first and the second ohmic contact and separated in a lateral direction. [Reference numerals] (114) Gate; (116) Source; (118) Drain; (AA,CC) Ohmic; (BB) Passivation layer</p>
申请公布号 KR20140035842(A) 申请公布日期 2014.03.24
申请号 KR20130109695 申请日期 2013.09.12
申请人 POWER INTEGRATIONS, INC. 发明人 RAMDANI JAMAL;MURPHY MICHAEL;LIU LINLIN
分类号 H01L29/778;H01L21/335 主分类号 H01L29/778
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