发明名称 |
Method to reduce program disturbs in non-volatile memory cells |
摘要 |
A non-volatile memory and methods of operating the same to reduce disturbs is provided. In one embodiment, the method includes coupling a first positive high voltage to a first global wordline in a first row of an array of memory cells, and coupling a second negative high voltage (VNEG) to a first bitline in a first column of the array to apply a bias to a non-volatile memory transistor in a selected memory cell to program the selected memory cell. A margin voltage having a magnitude less than VNEG is coupled to a second global wordline in a second row of the array, and an inhibit voltage coupled to a second bitline in a second column of the array to reduce a bias applied to a non-volatile memory transistor in an unselected memory cell to reduce program disturb of data programmed in the unselected memory cell due to programming. |
申请公布号 |
US8675405(B1) |
申请公布日期 |
2014.03.18 |
申请号 |
US201313920352 |
申请日期 |
2013.06.18 |
申请人 |
CYPRESS SEMICONDUCTOR CORPORATION;CYPRESS SEMICONDUCTOR CORP. |
发明人 |
GEORGESCU BOGDAN;HIROSE RYAN T.;KOUZNETSOV IGOR G.;PRABHAKAR VENKATRAMAN;SHAKERI KAVEH |
分类号 |
G11C11/34 |
主分类号 |
G11C11/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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