发明名称 |
Successive approximation register analog-to-digital converter and operation method thereof |
摘要 |
Provided are a successive approximation register analog-to-digital converter and an operation method thereof. The method includes latching input signals which respectively correspond to bits of a first series of bits as digital data by directly transmitting the input signals to a latch; latching input signals which respectively correspond to bits of a second series of bits as digital data by transmitting the input signals to the latch after amplifying the input signals during a first period of amplification by using a preamplifier; and latching input signals which respectively correspond to bits of a third series of bits as digital data by transmitting the input signals to the latch after amplifying the input signals during a second period of amplification by using the preamplifier. |
申请公布号 |
US8659463(B2) |
申请公布日期 |
2014.02.25 |
申请号 |
US201213531418 |
申请日期 |
2012.06.22 |
申请人 |
CHO YOUNG KYUN;JUNG JAE HO;ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
CHO YOUNG KYUN;JUNG JAE HO |
分类号 |
H03M1/34 |
主分类号 |
H03M1/34 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|