发明名称 |
Integrating transistors with different poly-silicon heights on the same die |
摘要 |
A method of fabricating an integrated circuit including a first region and a second region each having different poly-silicon gate structures is provided. The method includes depositing a first poly-silicon layer over the first and the second region and depositing, within the second region, an oxide layer over the first poly-silicon layer. A second poly-silicon layer is deposited over the first poly-silicon layer and the oxide region. A portion of the second poly-silicon layer that lies over the oxide region is then stripped away. |
申请公布号 |
US8652907(B2) |
申请公布日期 |
2014.02.18 |
申请号 |
US201113071385 |
申请日期 |
2011.03.24 |
申请人 |
LIN CHUAN;SHIRAIWA HIDEHIKO;DAVIS BRADLEY MARC;XUE LEI;CHAN SIMON S.;OHTSUKA KENICHI;HUI ANGELA T.;BELL SCOTT ALLAN;SPANSION LLC |
发明人 |
LIN CHUAN;SHIRAIWA HIDEHIKO;DAVIS BRADLEY MARC;XUE LEI;CHAN SIMON S.;OHTSUKA KENICHI;HUI ANGELA T.;BELL SCOTT ALLAN |
分类号 |
H01L21/28;H01L21/8234 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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