发明名称 Upbound input/output expansion request and response processing in a PCIe architecture
摘要 Embodiments of the invention relate to upbound input/output expansion requests and response processing in a PCIE architecture. A first request to perform an operation on a host system is intitiated. The first request is formatted for the first protocol and includes data that is required in order to process the first request. A second request is created in response to the first request, the second request includes a header and is formatted according to the second protocol. The data required to process the first request in the header of the second request is stored, and the second request is sent to the host system.
申请公布号 US8645606(B2) 申请公布日期 2014.02.04
申请号 US20100821243 申请日期 2010.06.23
申请人 GREGG THOMAS A.;CRADDOCK DAVID F.;LAIS ERIC N.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GREGG THOMAS A.;CRADDOCK DAVID F.;LAIS ERIC N.
分类号 G06F13/36 主分类号 G06F13/36
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