发明名称 METHODS AND ARRANGEMENTS RELATING TO SEMICONDUCTOR PACKAGES INCLUDING MULTI-MEMORY DIES
摘要 In an embodiment, there is provided a packaging arrangement comprising a substrate; a multi-memory die coupled to the substrate, wherein the multi-memory die comprises multiple individual memory dies, and each of the multiple individual memory dies is defined as an individual memory die within a wafer of semiconductor material during production of memory dies, and the multi-memory die is created by singulating the wafer of semiconductor material into memory dies, where at least one of the memory dies is the multi-memory die that includes the multiple individual memory dies that are still physically connected together; and a semiconductor die coupled to the multi-memory die and the substrate, wherein the semiconductor die is configured as a system on a chip, wherein at least one of the multi-memory die and the semiconductor die is attached to the substrate.
申请公布号 WO2014018538(A1) 申请公布日期 2014.01.30
申请号 WO2013US51694 申请日期 2013.07.23
申请人 MARVELL WORLD TRADE LTD.;SUTARDJA, SEHAT 发明人 SUTARDJA, SEHAT
分类号 H01L23/00 主分类号 H01L23/00
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