发明名称
摘要 PROBLEM TO BE SOLVED: To accelerate processing by achieving the parallel execution of a single operation and a data path operation. SOLUTION: The control circuit includes a main control part 12 for outputting a data transfer command, also executing the single operation and outputting the operation result and a data path operation indication, and a data transfer control part 13 for making data stored in an external storage device 2 be transferred to a data path circuit 4 by controlling a DMA controller 3 according to the data transfer command. When data transfer by the DMA controller 3 is completed, a data path control part 15 supplies the operation result of the single operation and a data path operation instruction which is the execution command of operation contents indicated by the data path operation indication to the data path circuit 4, and the data path operation is executed by the data path circuit 4. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP5404294(B2) 申请公布日期 2014.01.29
申请号 JP20090235009 申请日期 2009.10.09
申请人 发明人
分类号 G06F13/28 主分类号 G06F13/28
代理机构 代理人
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