| 摘要 |
<p>A CPU as a processor implements a first GHR that indicates, in time series, results which have predicted validity or invalidity of branches when instructions have been fetched, in addition to a second GHR that indicates, in time series, results which have decided validity or invalidity of branches when computation has been completed. When the instructions are fetched, a branch prediction unit in the CPU executes branch prediction by using a branch validity accuracy which are decided based on not only a branch history (BRHIS) but also the instruction fetch address and the first GHR and indicates whether the instruction is a branch direction as expected. When it is decided that the branch prediction has failed based on the result of the branch computation, a branch history update unit in the CPU copies the value of the second GHR to the first GHR. Then, an instruction fetch controller re-executes the instruction fetch.</p> |
