| 摘要 |
In one embodiment a circuit for testing delays is provided. A test signal generator circuit toggles a plurality of output signals 1 through N in sequential order, separating the toggles by a delay period. Each output signal is coupled to an input of a respective one of a plurality of delay circuits. A phase detector circuit is coupled to the delay circuits and is configured to determine the order in which signals output from delay circuits X-1, X, and X+1 are toggled for each delay circuit X. In response to the output signals being toggled in the order X-1 followed by X followed by X+1, the phase comparator circuit is configured to output a first signal indicating correct operation. Otherwise, the phase comparator circuit is configured to output a second signal indicating incorrect operation. |
