发明名称 DELAY-COMPENSATED ERROR INDICATION SIGNAL
摘要 A memory subsystem has multiple memory devices coupled to a command/address line and an error alert line, the error alert line delay-compensated to provide deterministic alert signal timing. The command/address line and the error alert line are connected between the memory devices and a memory controller that manages the memory devices. The command/address line is driven by the memory controller, and the error alert line is driven by the memory devices.
申请公布号 US2014013168(A1) 申请公布日期 2014.01.09
申请号 US201213997850 申请日期 2012.03.31
申请人 BAINS KULJIT SINGH;VERGIS GEORGE 发明人 BAINS KULJIT SINGH;VERGIS GEORGE
分类号 G06F11/10 主分类号 G06F11/10
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